Inside the Computer: The Fetch-Execute Cycle

 

Introduction

The Fetch-Execute Cycle, also known as the Instruction Cycle, is the fundamental process by which a CPU retrieves, interprets, and executes instructions. Every operation a computer performs—whether running a program, performing calculations, or responding to user input—depends on this cycle.

This cycle consists of four main steps:

1. Fetch – Retrieving the next instruction from memory.

2. Decode – Interpreting what the instruction means.

3. Execute – Performing the operation.

4. Store (Writeback) – Saving the result for future use.

Each instruction is a binary-encoded command that tells the CPU what action to perform. Instructions can involve arithmetic operations, logical comparisons, data movement, or control operations such as loops and jumps.

Detailed Breakdown of the Fetch-Execute Cycle

1. Fetch Stage (Fetching the instruction)

The fetch stage is responsible for retrieving an instruction from the computer’s main memory (RAM) and bringing it into the CPU for processing.

Steps in the Fetch Stage:

1. The Program Counter (PC) holds the memory address of the next instruction to be executed.

2. The address from the PC is copied into the Memory Address Register (MAR).

3. The Control Unit (CU) sends a read request to RAM, retrieving the instruction from the specified memory location.

4. The instruction is transferred from RAM to the Memory Data Register (MDR).

5. The instruction is then copied from the MDR to the Instruction Register (IR), where it will be processed.

6. The Program Counter (PC) is incremented to point to the next instruction.

🔹 Example:

• Suppose the next instruction is stored at memory address 1000.

• The PC points to address 1000, and the MAR stores this address.

• The instruction (ADD 5,3) is fetched from memory and placed in the IR.

• The PC is incremented to 1001 (next instruction).

📌 Key components involved in the Fetch Stage:

• Program Counter (PC): Keeps track of the next instruction’s address.

• Memory Address Register (MAR): Holds the address of the instruction being fetched.

• Memory Data Register (MDR): Temporarily stores fetched data or instructions.

• Instruction Register (IR): Holds the current instruction being processed.

• Control Unit (CU): Manages the overall execution flow.

2. Decode Stage (Decoding the instruction)

Once the instruction has been fetched, the CPU must determine what action needs to be performed. This is the role of the Decode Stage.

Steps in the Decode Stage:

1. The Control Unit (CU) extracts the opcode (operation code) from the instruction.

2. The CU interprets the opcode to identify the type of instruction (e.g., arithmetic, logic, data transfer).

3. If necessary, the CU identifies the operands (values needed for the operation).

4. The CPU prepares the required components (e.g., ALU, registers) for execution.

🔹 Example:

• The fetched instruction is ADD 5,3.

• The CU identifies "ADD" as an arithmetic operation.

• The CPU retrieves the values 5 and 3 from registers or memory.

• The ALU is prepared for an addition operation.

📌 Key components involved in the Decode Stage:

• Control Unit (CU): Interprets the instruction.

• Opcode: Specifies the operation (e.g., ADD, SUB, LOAD, STORE).

• Operands: Values used in the operation.

3. Execute Stage (Executing the instruction)

The Execute Stage is where the actual operation is performed. Depending on the instruction type, the CPU may carry out a mathematical calculation, a logical comparison, data movement, or a branching operation.

Steps in the Execute Stage:

1. If the instruction is an arithmetic or logic operation, the Arithmetic and Logic Unit (ALU) performs the computation.

2. If the instruction involves memory, data is transferred between the CPU and RAM.

3. If the instruction is a control operation (e.g., a jump or branch), the Program Counter (PC) may be modified.

🔹 Example:

• The instruction ADD 5,3 is executed.

• The ALU adds 5 and 3, producing the result 8.

• The result is stored in the Accumulator (ACC).

📌 Key components involved in the Execute Stage:

• Arithmetic and Logic Unit (ALU): Performs calculations and logical operations.

• Control Unit (CU): Directs the operation execution.

• Registers: Store intermediate values and results.

• Memory (RAM): May store or retrieve additional data.

4. Store Stage (Writeback Stage)

The Store Stage ensures that the result of the executed instruction is saved for future use.

Steps in the Store Stage:

1. The result from the ALU is stored in a register (usually the Accumulator).

2. If needed, the result is written to RAM for later retrieval.

3. If the instruction was a branch or jump, the Program Counter (PC) is updated to reflect the new instruction sequence.

🔹 Example:

• The result 8 from ADD 5,3 is stored in the Accumulator Register (ACC).

• If necessary, 8 is moved from the ACC to a specific memory address for later use.

📌 Key components involved in the Store Stage:

• Accumulator (ACC): Stores intermediate and final results.

• Memory (RAM): Stores data for later access.

• Program Counter (PC): May be modified if the instruction affects program flow.

Diagram of the Fetch-Execute Cycle

     ┌────────────┐

   │  Program               │

     │  Counter                   │

     └────▲───────┘

          │

          ▼

   ┌──────────────────┐

   │ Memory Address   │

   │ Register (MAR)   │

   └────────▲─────────┘

         │

         ▼

   ┌──────────────────┐

   │ Memory Data  │

   │ Register (MDR)   │

   └────────▲─────────┘

         │

         ▼

   ┌──────────────────┐

   │ Instruction                  │

   │ Register (IR)                   │

   └────────▲─────────┘

         │

         ▼

   ┌──────────────────┐

   │ Control Unit (CU)│

   └───────▲──────────┘

        │

        ▼

   ┌──────────────────┐

   │ Arithmetic & │

   │ Logic Unit (ALU) │

   └────────▲─────────┘

                         │

                       ▼

   ┌──────────────────┐

   │ Accumulator (ACC)│

   └──────────────────┘

Factors Affecting the Fetch-Execute Cycle

Several factors influence the efficiency of the Fetch-Execute Cycle:

1. Clock Speed: Higher speeds (e.g., 3.5 GHz) allow for faster instruction execution.

2. Multi-Core Processors: Multiple cores enable parallel instruction execution.

3. Cache Memory: Reduces access time by storing frequently used instructions.

4. Pipelining: Overlaps different stages of execution to improve efficiency.